- if (cpuflags & (1 << 24)) {
-
- char** fxbuf = 0;
-
- /* DAZ wasn't available in the first version of SSE. Since
- setting a reserved bit in MXCSR causes a general protection
- fault, we need to be able to check the availability of this
- feature without causing problems. To do this, one needs to
- set up a 512-byte area of memory to save the SSE state to,
- using fxsave, and then one needs to inspect bytes 28 through
- 31 for the MXCSR_MASK value. If bit 6 is set, DAZ is
- supported, otherwise, it isn't.
- */
-
+#if !( (defined __x86_64__) || (defined __i386__) || (defined _M_X64) || (defined _M_IX86) ) // !ARCH_X86
+ /* Non-Intel architecture, nothing to do here */
+ return;
+#else
+
+ /* Get the CPU vendor just for kicks */
+
+ // __cpuid with an InfoType argument of 0 returns the number of
+ // valid Ids in CPUInfo[0] and the CPU identification string in
+ // the other three array elements. The CPU identification string is
+ // not in linear order. The code below arranges the information
+ // in a human readable form. The human readable order is CPUInfo[1] |
+ // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
+ // before using memcpy to copy these three array elements to cpu_string.
+
+ int cpu_info[4];
+ char cpu_string[48];
+ string cpu_vendor;
+
+ __cpuid (cpu_info, 0);
+
+ int num_ids = cpu_info[0];
+ std::swap(cpu_info[2], cpu_info[3]);
+ memcpy(cpu_string, &cpu_info[1], 3 * sizeof(cpu_info[1]));
+ cpu_vendor.assign(cpu_string, 3 * sizeof(cpu_info[1]));
+
+ info << string_compose (_("CPU vendor: %1"), cpu_vendor) << endmsg;
+
+ if (num_ids > 0) {
+
+ /* Now get CPU/FPU flags */
+
+ __cpuid (cpu_info, 1);
+
+ if ((cpu_info[2] & (1<<27)) /* OSXSAVE */ &&
+ (cpu_info[2] & (1<<28) /* AVX */) &&
+ ((_xgetbv (_XCR_XFEATURE_ENABLED_MASK) & 0x6) == 0x6)) { /* OS really supports XSAVE */
+ info << _("AVX-capable processor") << endmsg;
+ _flags = Flags (_flags | (HasAVX) );
+ }
+
+ if (cpu_info[3] & (1<<25)) {
+ _flags = Flags (_flags | (HasSSE|HasFlushToZero));
+ }
+
+ if (cpu_info[3] & (1<<26)) {
+ _flags = Flags (_flags | HasSSE2);
+ }
+
+ /* Figure out CPU/FPU denormal handling capabilities */
+
+ if (cpu_info[3] & (1 << 24)) {
+
+ char** fxbuf = 0;
+
+ /* DAZ wasn't available in the first version of SSE. Since
+ setting a reserved bit in MXCSR causes a general protection
+ fault, we need to be able to check the availability of this
+ feature without causing problems. To do this, one needs to
+ set up a 512-byte area of memory to save the SSE state to,
+ using fxsave, and then one needs to inspect bytes 28 through
+ 31 for the MXCSR_MASK value. If bit 6 is set, DAZ is
+ supported, otherwise, it isn't.
+ */
+