- /* asm notes: although we explicitly save&restore rbx, we must tell
- gcc that ebx,rbx is clobbered so that it doesn't try to use it as an intermediate
- register when storing rbx. gcc 4.3 didn't make this "mistake", but gcc 4.4
- does, at least on x86_64.
- */
-
- asm volatile (
- "pushq %%rbx\n"
- "movq $1, %%rax\n"
- "cpuid\n"
- "movq %%rdx, %0\n"
- "popq %%rbx\n"
- : "=r" (cpuflags)
- :
- : "%rax", "%rbx", "%rcx", "%rdx"
- );
-
-#endif /* _LP64 */
-#endif /* PLATFORM_WINDOWS */
-
-#ifndef __APPLE__
- /* must check for both AVX and OSXSAVE support in cpuflags before
- * attempting to use AVX related instructions.
- */
- if ((cpuflags & (1<<27)) /* AVX */ && (cpuflags & (1<<28) /* (OS)XSAVE */)) {
-
- std::cerr << "Looks like AVX\n";
-
- /* now check if YMM resters state is saved: which means OS does
- * know about new YMM registers and saves them during context
- * switches it's true for most cases, but we must be sure
- *
- * giving 0 as the argument to _xgetbv() fetches the
- * XCR_XFEATURE_ENABLED_MASK, which we need to check for
- * the 2nd and 3rd bits, indicating correct register save/restore.
- */
-
- uint64_t xcrFeatureMask = 0;
-
-#if __GNUC__ > 4 || __GNUC__ == 4 && __GNUC_MINOR__ >= 4
- unsigned int eax, edx, index = 0;
- asm volatile("xgetbv" : "=a"(eax), "=d"(edx) : "c"(index));
- xcrFeatureMask = ((unsigned long long)edx << 32) | eax;
-#elif defined (COMPILER_MSVC)
- xcrFeatureMask = _xgetbv(_XCR_XFEATURE_ENABLED_MASK);
-#endif
- if (xcrFeatureMask & 0x6) {
- std::cerr << "Definitely AVX\n";