2 Copyright (C) 2012 Paul Davis
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 #include "libpbd-config.h"
22 #define _XOPEN_SOURCE 600
23 #include <cstring> // for memset
28 #ifdef PLATFORM_WINDOWS
32 #include "pbd/compose.h"
34 #include "pbd/error.h"
41 FPU* FPU::_instance (0);
45 /* use __cpuid() as the name to match the MSVC intrinsic */
48 __cpuid(int regs[4], int cpuid_leaf)
50 int eax, ebx, ecx, edx;
64 :"=m" (eax), "=m" (ebx), "=m" (ecx), "=m" (edx)
67 #if !defined(__i386__)
79 _xgetbv (uint32_t xcr)
82 /* it would be nice to make this work on OS X but as long we use veclib,
83 we don't really need to know about SSE/AVX on that platform.
88 __asm__ volatile ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (xcr));
89 return (static_cast<uint64_t>(edx) << 32) | eax;
93 #define _XCR_XFEATURE_ENABLED_MASK 0
95 #endif /* !COMPILER_MSVC */
111 error << _("FPU object instantiated more than once") << endmsg;
114 #if !( (defined __x86_64__) || (defined __i386__) || (defined _M_X64) || (defined _M_IX86) ) // !ARCH_X86
115 /* Non-Intel architecture, nothing to do here */
119 /* Get the CPU vendor just for kicks */
121 // __cpuid with an InfoType argument of 0 returns the number of
122 // valid Ids in CPUInfo[0] and the CPU identification string in
123 // the other three array elements. The CPU identification string is
124 // not in linear order. The code below arranges the information
125 // in a human readable form. The human readable order is CPUInfo[1] |
126 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
127 // before using memcpy to copy these three array elements to cpu_string.
133 __cpuid (cpu_info, 0);
135 int num_ids = cpu_info[0];
136 std::swap(cpu_info[2], cpu_info[3]);
137 memcpy(cpu_string, &cpu_info[1], 3 * sizeof(cpu_info[1]));
138 cpu_vendor.assign(cpu_string, 3 * sizeof(cpu_info[1]));
140 info << string_compose (_("CPU vendor: %1"), cpu_vendor) << endmsg;
144 /* Now get CPU/FPU flags */
146 __cpuid (cpu_info, 1);
148 if ((cpu_info[2] & (1<<27)) /* AVX */ &&
149 (cpu_info[2] & (1<<28) /* (OS)XSAVE */) &&
150 (_xgetbv (_XCR_XFEATURE_ENABLED_MASK) & 0x6)) { /* OS really supports XSAVE */
151 info << _("AVX-capable processor") << endmsg;
152 _flags = Flags (_flags | (HasAVX) );
155 if (cpu_info[3] & (1<<25)) {
156 _flags = Flags (_flags | (HasSSE|HasFlushToZero));
159 if (cpu_info[3] & (1<<26)) {
160 _flags = Flags (_flags | HasSSE2);
163 /* Figure out CPU/FPU denormal handling capabilities */
165 if (cpu_info[3] & (1 << 24)) {
169 /* DAZ wasn't available in the first version of SSE. Since
170 setting a reserved bit in MXCSR causes a general protection
171 fault, we need to be able to check the availability of this
172 feature without causing problems. To do this, one needs to
173 set up a 512-byte area of memory to save the SSE state to,
174 using fxsave, and then one needs to inspect bytes 28 through
175 31 for the MXCSR_MASK value. If bit 6 is set, DAZ is
176 supported, otherwise, it isn't.
179 #ifndef HAVE_POSIX_MEMALIGN
180 # ifdef PLATFORM_WINDOWS
181 fxbuf = (char **) _aligned_malloc (sizeof (char *), 16);
183 *fxbuf = (char *) _aligned_malloc (512, 16);
186 # warning using default malloc for aligned memory
187 fxbuf = (char **) malloc (sizeof (char *));
189 *fxbuf = (char *) malloc (512);
193 (void) posix_memalign ((void **) &fxbuf, 16, sizeof (char *));
195 (void) posix_memalign ((void **) fxbuf, 16, 512);
199 memset (*fxbuf, 0, 512);
216 uint32_t mxcsr_mask = *((uint32_t*) &((*fxbuf)[28]));
218 /* if the mask is zero, set its default value (from intel specs) */
220 if (mxcsr_mask == 0) {
224 if (mxcsr_mask & (1<<6)) {
225 _flags = Flags (_flags | HasDenormalsAreZero);
228 #if !defined HAVE_POSIX_MEMALIGN && defined PLATFORM_WINDOWS
229 _aligned_free (*fxbuf);
230 _aligned_free (fxbuf);
238 /* finally get the CPU brand */
240 __cpuid (cpu_info, 0x80000000);
242 const int parameter_end = 0x80000004;
245 if (cpu_info[0] >= parameter_end) {
246 char* cpu_string_ptr = cpu_string;
248 for (int parameter = 0x80000002; parameter <= parameter_end &&
249 cpu_string_ptr < &cpu_string[sizeof(cpu_string)]; parameter++) {
250 __cpuid(cpu_info, parameter);
251 memcpy(cpu_string_ptr, cpu_info, sizeof(cpu_info));
252 cpu_string_ptr += sizeof(cpu_info);
254 cpu_brand.assign(cpu_string, cpu_string_ptr - cpu_string);
255 info << string_compose (_("CPU brand: %1"), cpu_brand) << endmsg;